Recent advances in packaging and integrated circuit processes result in increasing use of packages mounted on interposers or substrates to form modules that are mounted to printed circuit boards (“PCBs”) to complete systems. As the use of increasingly advanced integrated circuits in ever smaller and denser devices, such as portable devices, increases, the need for smaller, thinner, and less costly techniques to couple integrated circuit devices to PCBs continues to increase.
The use of solder bumps and solder balls to connect devices is also becoming more prevalent. In a typical arrangement, a solder bumped integrated circuit die may be mounted on the top surface of an interposer formed of a laminate material, silicon, ceramic, films and the like. The lower surface of the interposer may then have solder balls arranged in a pattern that corresponds to a land or pad pattern on the PCB. This may be referred to as “flip chip” package, as the integrated circuit is mounted “face down,” or flipped, onto the interposer. After the integrated circuit is mounted on the interposer, the assembly may then be mounted on the PCB. The use of stacked dies, or package on package arrangements, including the interposer, are known.
The use of the interposer, with the accompanying costs and manufacturing steps, increases costs and lowers throughput for the manufacture of the completed system. An alternative is to use wafer level processing (“WLP”) to form solder connectors, typically solder balls, directly on the face of a semiconductor wafer. These steps may be performed on the entire wafer at once, achieving economies of scale and reducing costs. Further this approach can eliminate the need for an expensive interposer and the accompanying manufacture and test processes needed to produce it.
In the use of WLP packaging, the solder balls are attached to the PCB surface and to the post passivation interconnect (“PPI”) connectors on the wafer or integrated circuit die. Because there will be thermal stress on the assembly during system operation due to the differences in coefficients of thermal expansion between the PCB material and the semiconductor wafer, the solder balls now have increased stress. Direct mounting of the die to the PCB using solder connectors results in added stress on the solder connectors, compared to “flip chip” packages with interposers.
In testing, solder connectors are shown to fail as “open” failures due to stress in thermal cycle tests. The solder balls can crack, particularly close to the PPI connections. Improved solder connectors are therefore needed.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the preferred embodiments and are not necessarily drawn to scale.